Coding for Reuse Course - Module 1 Review

Let's take a look at some of the things we discussed in module 1 and see if you can start using them.


In module 1 we discussed several items related to getting a development project started. Please remember that these items are not confined to microprocessor design only. They should be used in creating any project. Get in a habit of following a logical design flow not only for your own sake, but also for the other engineers who must sustain your design in the long term.

Our lessons dealt with the following topics:

  • Module 1 introduction started with project definition and considerations. It created the customer constraints and allowances within our particular project

  • In Lesson 1 we learned the rules and recommendations for coding for reuse and how to structure the files within our project.

  • In Lesson 2 we studied project architecture development and design partitioning. We created block diagrams and a skeleton for our project.

  • Lesson 3 introduced concurrent test bench setup and we designed a preliminary test bench.

  • Lesson 4 discussed the differences between parameters and defines and how to use them.

  • In Lesson 5 we designed circuits that could divide a periodic signal by an odd number and developed our timing module.

  • Lesson 6 expounded on our discussion of parameters and definitions by detailing the parameterized module used in Lesson 5. We also learned about different forms of multiplexers and how to code them for later use in our project,

  1. You have just been given a project for a USART. You know that it must serialize parallel data. What else should you do to get started? (Hint).

  2. What do parameters generally evaluate as? (Hint).

  3. Write the code for a 20% duty cycle clock whose period may be defined on a per-application basis. (Hint).

  4. Older programmable devices use what type of logic structure? (Hint).

  5. Why don't we just use the vendor library functions? (Hint).

  6. What is the first step in creating a test bench? (Hint).

  7. What rules or recommendations does the following code violate?

         assign b = 4'b1x1;
         assign d = 10;
         always @(c)
             if (c) a = 0; else a = d;
         always @(sel or a) out = (sel)? ((a)? 0 : b) : z;


  8. Rewrite the code from the previous question in a reusable fashion. (Hint).

  9. What it called when one parameter uses another parameter as its value? (Hint).

  10. Design a module that divides a 200 MHz clock signal by 9. (Hint).

  11. A datasheet for the 8254 counter/timer can be found at: Partition and create a block diagram for an intellectual property replacement (Hint).

  12. What is a "BOILERPLATE"? (Hint).

  13. Design a n-bit parameterized modulo one adder. Set it up for a conditional compile to prevent multiple versions. (Hint).

  14. Explain routing costs. (Hint).

  15. What type of oscillator uses an inverting buffer for the feedback source? (Hint).

  16. What must be done when crossing clock domain boundaries? (Hint).

  17. Should test benches be partitioned? (Hint).

  18. What is a define statement? (Hint).

  19. What directive must appear in the top-level "INITIAL" statement of your test bench to prevent the simulator tool from running on forever? (Hint).

  20. How do I create an asymmetric clock signal? (Hint).

  21. What is the scope of a define? Of a parameter? (Hint).

  22. What is a "sum of products"? How is it used? (Hint).

  23. I have a framer driven by an external PLL in the LIU. My target device is a Xilinx Xc3s1200E which features internal DLL's. Why shouldn't I just use these? (Hint).

  24. Another company created a device quite similar. It works. Shouldn't I just duplicate what was already done? (Hint).